december 2002 advance information
p1817a/b 12/20/02, v. 0.4 alliance se miconductor p. 1 of 6 low-power mobile vga emi reduction ic pulsec re features ? fcc approved method of emi attenuation ? generates a low emi spread spectrum and a non- spread reference signal of the input clock frequency ? optimized for frequency range from ? p1817a: 20 to 32 mhz operation ? p1817b: 10 to 20 mhz operation ? internal loop filter minimizes external components and board space ? two selectable spread ranges ? low inherent cycle-to-cycle jitter ? 3.3 and 5.0 v operating voltage ? cmos/ttl compatible inputs and outputs ? ultra low power cmos design: 3.17ma @3.3v, 10 mhz 6.20ma @5.0v, 10 mhz 4.28ma @3.3v, 14 mhz 7.50ma @5.0v, 14 mhz 5.50ma @3.3v, 20 mhz 9.50ma @5.0v, 20 mhz ? supports notebook vga and other lcd timing con- troller applications ? sson pin for spread spectrum on/off and standby mode controls ? available in 8-pin soic and tssop block diagram frequency divider feedback divider modulation phase detector loop filter vco output divider crystal oscillator modout sr0 sson vdd vss pll xin xout ref product description the p1817 is a versatile spread spectrum frequency modulator designed specifically for a wide range of clock frequencies. it reduces electromagnetic interference (emi) at the clock source allowing system-wide reduction of emi of downstream clock and data dependent signals. it allows significant system cost saving s by reducing the number of circuit board layers and shielding traditionally required to pass emi regulations. the p1817 modulates the output of a single pll in order to spread the bandwidth of a synthesized clock, thereby decreasing the peak amplitud es of its harmonics. this results in significantly lowe r system emi compared to the typical narrow band signal produced by oscillators and most clock generators. lowering emi by increasing a signal?s bandwidth is called spread spectrum clock generation. the p1817 uses the most efficient and optimized modulation profile approved by the fcc and is implemented by using a proprietary all-digital method. applications the p1817 is targeted toward the notebook vga chip and other displays using an lvds interface, pc peripheral devices, and embedded systems. pin diagram clkin vss sr0 sson/sbm xout vdd ref modout 1 2 3 4 8 7 6 5
p1817a/b 12/20/02, v. 0.4 alliance semiconductor p. 2 of 6 standby mode selection spread range selection pin description clkin sson/sbm spread spectrum modout pll mode disabled 0 n/a disabled disabled standby disabled 1 n/a disabled free running free running enabled 0 off reference disabled buffer out enabled 1 on normal normal normal sr0 spreading range modulation rate 0 1.50% (fin/10) * 20.83 khz 1 1.25% (fin/10) * 20.83 khz pin # name type description 1clkin i connect to externally generated clock signal. to put the part into standby mode, disable the input clock signal to this pin and pull sson/sbm (pin 4) low. (see standby mode selection.) 2 vss p ground connection. connect to system ground. 3sr0 i digital logic input used to select sp reading range. (see spread spectrum selection.) this pin has an internal pull-up resistor. 4 sson/sbm i spread spectrum on/off and standby mode control. (see standby mode selection.) this pin has an internal pull-up resistor. 5modouto spread spectrum clock output or reference output. (see standby mode selection.) 6 ref o reference output. 7 vdd p connect to +3.3 v or 5.0 v. 8 xout i connect to crystal. no connect if ex ternally generated clock signal is used.
p1817a/b 12/20/02, v. 0.4 alliance semiconductor p. 3 of 6 schematic for noteb ook vga application clkin vss sr0 sson/sbm xout vdd ref modout 1 2 3 4 8 7 6 5 p1817a/b vdd 0.1 uf tie pin 3 sr0 high/low according to spread range desired. external resistors are not needed to pull these pins high. pin 4 sson should be left unconnected to turn on spre ad spectrum. pull this pin low to turn spread spectrum off and enable standby mode. 1 10 mhz to 32 mhz emi reduced clock output. 1 to set the p1817 to standby mode, disable the input clock (pin 1 clkin), and pull pin 4 sson/sbm low. ferrite bead
p1817a/b 12/20/02, v. 0.4 alliance semiconductor p. 4 of 6 absolute maximum ratings dc electrical characteristics ac electrical characteristics symbol parameter rating units v dd , v in voltage on any pin with respect to gnd -0.5 to +7.0 v t stg storage temperature -65 to +125 c t a operating temperature 0 to +70 c symbol parameter min typ max units v il input low voltage gnd - 0.3 ? 0.8 v v ih input high voltage 2.0 ? v dd + 0.3 v i il input low current (pull-up resistor on inputs sr0 and sson/sbm) ??-35 a i ih input high current ? ? 35 a i xol xout output low current at 0.4 v, v dd = 3.3v ? 3 ? ma at 0.4 v, v dd = 5.0 v ? 20 ? ma i xoh xout output high current at 2.5 v, v dd = 3.3 v ? 3 ? ma at 4.5 v, v dd = 5.0 v ? 20 ? ma v ol output low voltage v dd = 3.3 v, i ol = 20 ma ? ? 0.4 v v dd = 5.0 v, i ol = 20 ma???v v oh output high voltage v dd = 3.3 v, i ol = 20 ma 2.5 ? ? v v dd = 5.0 v, i ol = 20 ma 4.5 ? ? v i dd static supply current standby mode ? 0.6 ? ma i cc dynamic supply current normal mode: 3.3 v and 10 pf loading f in-min f in-typ f in-max 3.2?7.0ma 5.0 v and 10 pf loading 6.2 ? 13.6 ma v dd operating voltage 2.7 3.3 5.5 v t on power-up time (first locked cycle after power up) ? 0.18 ? ms z out clock output impedance ? 50 ? ? symbol parameter min typ max units f in input frequency 10 ? 32 mhz f out output frequency 10 ? 32 mhz t lh 1 1 t lh and t hl are measured into a capacitive load of 15 pf. output rise time measured at 0.8 v to 2.0 v 0.7 0.9 1.1 ns measured at 1.2 v to 3.75 v ? 0.75 ? ns t hl 1 output fall time measured at 2.0 v to 0.8 v 0.6 0.8 1.0 ns measured at 1.2 v to 3.75 v ? 0.75 ? ns t jc jitter (cycle to cycle) ? ? 360 ps t d output duty cycle 45 50 55 %
p1817a/b 12/20/02, v. 0.4 alliance semiconductor p. 5 of 6 mechanical package outline (8-pin soic) mechanical package outline (8-pin tssop) inches millimeters symbol min nor max min nor max a 0.057 0.064 0.071 1.45 1.63 1.80 a1 0.004 0.007 0.010 0.10 0.18 0.25 a2 0.053 0.061 0.069 1.35 1.55 1.75 b 0.012 0.016 0.020 0.31 0.41 0.51 c 0.004 0.006 0.001 0.10 0.15 0.25 d 0.186 0.194 0.202 4.72 4.92 5.12 e 0.148 0.156 0.164 3.75 3.95 4.15 e 0.050 bsc 1.27 bsc h 0.224 0.236 0.248 5.70 6.00 6.30 l 0.012 0.020 0.028 0.30 0.50 0.70 a 0 5 8 0 5 8 note: controlling dimensions are millimeters. soic - 0.074 grams unit weight d a1 e b a a2 p1817a/b lot number yyww h a c l e inches millimeters symbol min nor max min nor max a ? ? 0.047 ? ? 1.10 a1 0.002 ? 0.006 0.05 ? 0.15 a2 0.031 0.039 0.041 0.80 1.00 1.05 b 0.007 ? 0.012 0.19 ? 0.30 c 0.004 ? 0.008 0.09 ? 0.20 d 0.114 0.118 0.122 2.90 3.00 3.10 e 0.169 0.173 0.177 4.30 4.40 4.50 e 0.026 bsc 0.65 bsc h 0.244 0.252 0.260 6.20 6.40 6.60 l 0.018 0.024 0.030 0.45 0.60 0.75 a 0 ? 8 0 ? 8 note: controlling dim ensions are millimeters. tssop - 0.034 grams unit weight d a1 e b a a2 h a c l e p 1817a/b lot # yyww
? copyright alliance semiconductor corporati on. all rights reserved. our three-point l ogo, our name and intelliwatt are tradema rks or registered trademarks of alliance. all other brand and product names may be the trademarks of their respective companies. alliance reserves the right to make changes to this document and its products at any time without notice. alliance assumes no responsibility for any errors that may appear in this document. the data contained herein represents alliance?s best data and/or estimates at the time of issuance. alliance reserves the right to change or correct this data at any time, without notice. if the product described herein is under development, significant changes to these specifications ar e possible. the information in this product data sheet is inte nded to be general descriptive in formation for potential customers and users, and is not intended to operate as, or provide, any guarantee or warrantee to any user or customer. alliance does not assume any responsibility or liab ility arising out of the application or use of any product described herein, and disclaims any express or implied warranties related to the sale and/or use of alliance products including li ability or warranties related to fitness for a particular purpose, merchantability, or infringeme nt of any intellectual property rights, except as express agreed to in alliance?s terms and conditions of sale (which are available fr om alliance). all sa les of alliance product s are made exclusively according to alliance?s terms and conditions of sale. the purchase of products from alliance does not convey a license under any patent rights, copyrights, ma sk works rights, trademarks, or any oth er intellectual property rights of alliance or th ird parties. allia nce does not authorize its products for use as critical components in life-supporting systems where a ma lfunction or failure may reasonably be expected to result i n significant injury to the user, and the inclusion of alliance products in such life-supporting systems implies that the manufacturer assumes all risk of such use and ag rees to indemnify alliance against all claims arising from suc h use. p1817a/b 12/20/02, v. 0.4 alliance semiconductor p. 6 of 6 ordering information licensed under u.s. patent nos. 5,488,627 and 5,631,920. preliminary datasheet. s pecifications subject to change without notice. order number marking input frequency (mhz) package type quantity/ reel temperature p1817a-08st p1817a 20 ? 32 8-pin soic, tube 0 c to 70 c p1817a-08sr p1817a 20 ? 32 8-pin soic, tape & reel 2,500 0 c to 70 c p1817a-08tt p1817a 20 ? 32 8-pin tssop, tube 0 c to 70 c p1817a-08tr p1817a 20 ? 32 8-pin tssop, tape & reel 2,500 0 c to 70 c p1817b-08st p1817b 10 ? 20 8-pin soic, tube 0 c to 70 c p1817b-08sr p1817b 10 ? 20 8-pin soic, tape & reel 2,500 0 c to 70 c p1817b-08tt p1817b 10 ? 20 8-pin tssop, tube 0 c to 70 c p1817b-08tr p1817b 10 ? 20 8-pin tssop, tape & reel 2,500 0 c to 70 c
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